Any required SPI output signals must be configured as outputs, either by calling InitSPI() or by setting the appropriate bits in the Port D data direction register DDRD. If the /SS pin of the master is an input and if a low input level is detected, the processor sets the MODF bit in the SPI status register a "mode fault" condition. The master and slave can then exchange data. If an interrupt service routine takes longer than 200 µs, then an entire serial bit will be missed, causing a communications error. Then reading the data that was received (by reading the SPDR) or initiating a new data transfer (by writing to the SPDR) automatically clears the SPIF flag. A data transfer is initiated by a master device when it stores a message byte into its SPDR register. WCOL is cleared by a read to the SPSR followed by a read or write to the SPDR. There are three flag bits implemented in the SPSR (SPI status register).

Any of these conditions may generate an interrupt if the SPIE (SPI interrupt enable) bit in the SPCR control register is set. Although data byte transfers are easily executed once the network has been wired and configured properly, a carefully executed software protocol may be required to ensure data integrity. In some circumstances a one-way data flow may suffice. The BufferToSPI() function implements fast data transfer from a specified buffer in the controller’s memory to an SPI device. Regardless of the network, however, there are only four signals used: SCK provides a synchronized clock, MOSI and MISO signals are used for data transmission and reception, and /SS configures the QScreen as a master or slave device. Note that the master device outputs the clock synchronization signal SCK to the slave’s SCK which is configured as an input. In general, all devices on a network should use the same phase, polarity, and baud rate clock signal. If your application requires use of the secondary serial port as well as other interrupt routines, the key is to keep the interrupt service routines short and fast. For those of you interested in the details, here’s how it works: The low-level serial driver routines named Key(), AskKey() and Emit() are revectorable routines that can be redirected to use either of the serial ports.

Hardware is interfaced to the SPI via three PORTD pins named SCK, MOSI, and MISO brought out to pins 7, 8, and 10 on the Wildcard Port Header (see Appendix B). The clock’s polarity is controlled by a bit named CPOL (clock polarity) and its phase is controlled by CPHA (clock phase). The CPOL and CPHA bits configure the synchronous clock polarity and phase and specify when valid data is present on the MISO and MOSI data lines. The rate of data transmission is expressed in bits per second, or baud. Even though the MOSI pin is not connected to anything, the master initiates a transmission using a "dummy" byte. The GROUND line serves as a common voltage reference for the master and slave. A ground connection is also necessary to ensure that the communicating devices have a common voltage reference. In fact, the program works the same as it did before, but now it is using the secondary serial port instead of the primary port -- and you didn’t even have to recompile the code! The maximum sustainable baud rate on the secondary serial port is 4800 baud.

On the other hand, the secondary serial port (Serial2) is implemented using hardware pins PA3 (input) and PA4 (output), and is controlled by the associated interrupts IC4/OC5 and OC4, respectively. A hardware reset (pressing down on the reset switch) has the same effect. If you do this now, remember to move the QScreen Controller’s serial connector back to Serial Port 1, and to change the terminal’s baud rate back to 19200 baud using the "Comm" item under the terminal’s "Settings" menu. Now select the "Comm" item in the "Settings" menu of the Terminal program, and click on 1200 baud (or whatever baud rate you selected in the command above). A mode fault occurs when the SPI senses that a multimaster conflict (MC68HC11F1 Technical Data Manual, p.8-7) exists on the network as explained above in connection with the /SS input. There are a variety of ways the MOSI, MISO, SCK and /SS pins on your QScreen Controller can be connected. Thus, the master has only one input, MISO, which is the slave’s only output.

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